从
AMD Architecture Programmer’s Manual Volume 2: System Programming开始,第4.5.3节:
FS and GS Registers in 64-Bit Mode. Unlike the CS,DS,ES,and SS segments,the FS and GS segment overrides can be used in 64-bit mode. When FS and GS segment overrides are used in 64-bit mode,their respective base addresses are used in the effective-address (EA) calculation. The complete EA calculation then becomes (FS or GS).base + base + (scale * index) + displacement. The FS.base and GS.base values are also expanded to the full 64-bit virtual-address size,as shown in Figure 4-5. The resulting EA calculation is allowed to wrap across positive and negative addresses.
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There are two methods to update the contents of the FS.base and GS.base hidden descriptor fields. The first is available exclusively to privileged software (CPL = 0). The FS.base and GS.base hidden descriptor-register fields are mapped to MSRs. Privileged software can load a 64-bit base address in canonical form into FS.base or GS.base using a single WRMSR instruction. The FS.base MSR address is C000_0100h while the GS.base MSR address is C000_0101h.
The second method of updating the FS and GS base fields is available to software running at any privilege level (when supported by the implementation and enabled by setting CR4[FSGSBASE]). The WRFSBASE and WRGSBASE instructions copy the contents of a GPR to the FS.base and GS.base fields respectively. When the operand size is 32 bits,the upper doubleword of the base is cleared. WRFSBASE and WRGSBASE are only supported in 64-bit mode.