工程中startup_LPC17XX.s是M3的启动文件,启动文件由汇编语言写的,它的作用一般是下面这几个:
1)堆和栈的初始化
2)中断向量表定义
3)地址重映射及中断向量表的转移
4)设置系统时钟频率
5)中断寄存器的初始化
6)进入C应用程序
core_cm3.c与core_cm3.h主要是M3外围驱动源代码与头文件,使用时一般不需要修改,直接调用就可以。system_LPC17xx.c与system_LPC17xx.h是关于系统的文件,里面主要提供了系统初始化函数SystemInit(),文件中默认情况下定义的晶振的大小为12M,使用的是外部晶振,还使用了PLL0倍频,关于倍频的问题,以后慢慢再总结。芯片LPC1768的初始化主要包括时钟配置,电源管理,功耗管理等。相比较而言,时钟配置相对复杂,因为它包括两个PLL倍频电路,一个是主PLL0主要是为系统和USB提供时钟,另一个是PLL1专门为USB提供48M时钟,但也可以不使用它们。由于时钟配置比较灵活,所以相以设置这些参数也比较复杂,但是这些在系统文件中已有明确的定义,所以想要变动时只需修改系统文件中相应的宏或函数即可。
程序完成如下内容的工作:
? ? ? ? 开辟一块大小为Stack_Size的栈空间;
? ? ? ??标号__initial_sp指向栈顶位置;
? ? ? ??定义堆空间大小为Heap_Size;
? ? ? ??建立中断向量表Vectors,cortex-M3规定起始地址必须存放栈顶地址即__initial_sp,紧接着存放复位入口地址,这样内核复位后就会自动从起始地址的下32位取出复位地址执行复位中断服务函数。
? ? ? ??Reset_Handler复位中断函数中先EXPORT声明Reset_Handler的全局性,然后分别执行外部的函数SystemInit和__main。
下面对汇编程序中的几个关键字做说明:
? ? ? ??AREA伪指令:用于定义代码段和数据段,后跟属性标号。其中“READWRITE”表示可读写,“READONLY”只读属性。根据LPC1788的数据手册描述的存储介质,可知可读写段保持在SRAM区,起始地址为0x1000 0000,代码中的堆栈保存在SRAM空间。只读段保存在Flash区,起始地址为0x0000 0000,代码中的中断向量表保存在Flash空间。 因此可以总结出,在0x0000 0000 存放的是栈顶的地址__initial_sp(即0x1000 0200),在0x0000 0004 存放的是Reset_Handler的地址。
图1:LPC1788 地址映射
图2: debug中 0地址的值0x1000 0200 即栈顶地址, 0x0000 0004 地址值为0x0000 00F9(看反汇编可知该值 即Reset_Handler的入口如下图)。
? ? ? ? DCD指令:开辟内存空间,中断向量表建立中使用相当于C语言中的函数指针,每个成员都是函数指针,指向各个中断服务函数。
? ? ? ? 自此分析了LPC1788的启动,主要包括堆栈初始化,和中断向量表的初始化。LPC1788有内部Flash,所以上电从内部Flash启动,内部Flash的起始地址为0x0000 0000,存放栈顶的地址0x1000 0200。 0x0000 0004存放复位中断的入口地址。LPC1788复位后,从0x0000 0004取出复位入口地址,执行中断复位函数,从而跳转到SystemInit和main C语言函数执行
;/***************************************************************************** ; * @file: startup_LPC17xx.s ; * @purpose: CMSIS Cortex-M3 Core Device Startup File ; * for the NXP LPC17xx Device Series ; * @version: V1.0 ; * @date: 25. Nov. 2008 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; * Copyright (C) 2008 ARM Limited. All rights reserved. ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3 ; * processor based microcontrollers. This file can be freely distributed ; * within development tools that are supporting such ARM based processors. ; * ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES,WHETHER EXPRESS,IMPLIED ; * OR STATUTORY,INCLUDING,BUT NOT LIMITED TO,IMPLIED WARRANTIES OF ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ; * ARM SHALL NOT,IN ANY CIRCUMSTANCES,BE LIABLE FOR SPECIAL,INCIDENTAL,OR ; * CONSEQUENTIAL DAMAGES,FOR ANY REASON WHATSOEVER. ; * ; *****************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000200 AREA STACK,NOINIT,READWRITE,ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP,ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET,DATA,READONLY EXPORT __Vectors __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WDT_IRQHandler ; 16: Watchdog Timer DCD TIMER0_IRQHandler ; 17: Timer0 DCD TIMER1_IRQHandler ; 18: Timer1 DCD TIMER2_IRQHandler ; 19: Timer2 DCD TIMER3_IRQHandler ; 20: Timer3 DCD UART0_IRQHandler ; 21: UART0 DCD UART1_IRQHandler ; 22: UART1 DCD UART2_IRQHandler ; 23: UART2 DCD UART3_IRQHandler ; 24: UART3 DCD PWM1_IRQHandler ; 25: PWM1 DCD I2C0_IRQHandler ; 26: I2C0 DCD I2C1_IRQHandler ; 27: I2C1 DCD I2C2_IRQHandler ; 28: I2C2 DCD SPI_IRQHandler ; 29: SPI DCD SSP0_IRQHandler ; 30: SSP0 DCD SSP1_IRQHandler ; 31: SSP1 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) DCD RTC_IRQHandler ; 33: Real Time Clock DCD EINT0_IRQHandler ; 34: External Interrupt 0 DCD EINT1_IRQHandler ; 35: External Interrupt 1 DCD EINT2_IRQHandler ; 36: External Interrupt 2 DCD EINT3_IRQHandler ; 37: External Interrupt 3 DCD ADC_IRQHandler ; 38: A/D Converter DCD BOD_IRQHandler ; 39: Brown-Out Detect DCD USB_IRQHandler ; 40: USB DCD CAN_IRQHandler ; 41: CAN DCD DMA_IRQHandler ; 42: General Purpose DMA DCD I2S_IRQHandler ; 43: I2S DCD ENET_IRQHandler ; 44: Ethernet DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer DCD MCPWM_IRQHandler ; 46: Motor Control PWM DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) ; IF :LNOT::DEF:NO_CRP ; AREA |.ARM.__at_0x02FC|,CODE,READONLY ;CRP_Key DCD 0xFFFFFFFF ; ENDIF AREA |.text|,READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main LDR R0,=__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WDT_IRQHandler [WEAK] EXPORT TIMER0_IRQHandler [WEAK] EXPORT TIMER1_IRQHandler [WEAK] EXPORT TIMER2_IRQHandler [WEAK] EXPORT TIMER3_IRQHandler [WEAK] EXPORT UART0_IRQHandler [WEAK] EXPORT UART1_IRQHandler [WEAK] EXPORT UART2_IRQHandler [WEAK] EXPORT UART3_IRQHandler [WEAK] EXPORT PWM1_IRQHandler [WEAK] EXPORT I2C0_IRQHandler [WEAK] EXPORT I2C1_IRQHandler [WEAK] EXPORT I2C2_IRQHandler [WEAK] EXPORT SPI_IRQHandler [WEAK] EXPORT SSP0_IRQHandler [WEAK] EXPORT SSP1_IRQHandler [WEAK] EXPORT PLL0_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT EINT0_IRQHandler [WEAK] EXPORT EINT1_IRQHandler [WEAK] EXPORT EINT2_IRQHandler [WEAK] EXPORT EINT3_IRQHandler [WEAK] EXPORT ADC_IRQHandler [WEAK] EXPORT BOD_IRQHandler [WEAK] EXPORT USB_IRQHandler [WEAK] EXPORT CAN_IRQHandler [WEAK] EXPORT DMA_IRQHandler [WEAK] EXPORT I2S_IRQHandler [WEAK] EXPORT ENET_IRQHandler [WEAK] EXPORT RIT_IRQHandler [WEAK] EXPORT MCPWM_IRQHandler [WEAK] EXPORT QEI_IRQHandler [WEAK] EXPORT PLL1_IRQHandler [WEAK] WDT_IRQHandler TIMER0_IRQHandler TIMER1_IRQHandler TIMER2_IRQHandler TIMER3_IRQHandler UART0_IRQHandler UART1_IRQHandler UART2_IRQHandler UART3_IRQHandler PWM1_IRQHandler I2C0_IRQHandler I2C1_IRQHandler I2C2_IRQHandler SPI_IRQHandler SSP0_IRQHandler SSP1_IRQHandler PLL0_IRQHandler RTC_IRQHandler EINT0_IRQHandler EINT1_IRQHandler EINT2_IRQHandler EINT3_IRQHandler ADC_IRQHandler BOD_IRQHandler USB_IRQHandler CAN_IRQHandler DMA_IRQHandler I2S_IRQHandler ENET_IRQHandler RIT_IRQHandler MCPWM_IRQHandler QEI_IRQHandler PLL1_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0,= Heap_Mem LDR R1,=(Stack_Mem + Stack_Size) LDR R2,= (Heap_Mem + Heap_Size) LDR R3,= Stack_Mem BX LR ALIGN ENDIF END